72 lines
1.7 KiB
C
72 lines
1.7 KiB
C
#ifndef _TUSB_CONFIG_H_
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#define _TUSB_CONFIG_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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//--------------------------------------------------------------------+
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// Board Specific Configuration
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//--------------------------------------------------------------------+
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#ifndef BOARD_TUD_RHPORT
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#define BOARD_TUD_RHPORT 0
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#endif
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#ifndef BOARD_TUD_MAX_SPEED
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#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
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#endif
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//--------------------------------------------------------------------
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// Common Configuration
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//--------------------------------------------------------------------
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#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | OPT_MODE_FULL_SPEED)
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#ifndef CFG_TUSB_OS
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#define CFG_TUSB_OS OPT_OS_NONE
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#endif
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#ifndef CFG_TUSB_DEBUG
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#define CFG_TUSB_DEBUG 0
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#endif
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// Enable Device stack
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#define CFG_TUD_ENABLED 1
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#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
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// USB DMA section / alignment
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#ifndef CFG_TUSB_MEM_SECTION
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#define CFG_TUSB_MEM_SECTION
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#endif
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#ifndef CFG_TUSB_MEM_ALIGN
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#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
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#endif
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//--------------------------------------------------------------------
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// Device Configuration
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//--------------------------------------------------------------------
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#ifndef CFG_TUD_ENDPOINT0_SIZE
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#define CFG_TUD_ENDPOINT0_SIZE 64
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#endif
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// Class configurations
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#define CFG_TUD_CDC 1
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#define CFG_TUD_MSC 0
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#define CFG_TUD_HID 0
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#define CFG_TUD_MIDI 0
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#define CFG_TUD_VENDOR 0
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// CDC FIFO size of TX and RX
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#define CFG_TUD_CDC_RX_BUFSIZE 1024
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#define CFG_TUD_CDC_TX_BUFSIZE 1024
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// CDC Endpoint transfer buffer size
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#define CFG_TUD_CDC_EP_BUFSIZE 64
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#ifdef __cplusplus
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}
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#endif
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#endif /* _TUSB_CONFIG_H_ */
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